akcli-jlcpcb-capabilitieslisted
Consult 嘉立創/JLC (jlc.com) manufacturing capabilities — the PRIMARY reference — while designing a board: rigid PCB (1-64 layers, HDI blind/buried vias, 0.1 mm microvias, up to 6 oz copper), FPC, and SMT assembly limits with exact numbers, plus a JLCPCB-international (jlcpcb.com) difference table and stencil specs. Use this skill whenever the task involves: choosing trace width/spacing, via or drill sizes, board size/thickness, copper weight, solder mask or silkscreen limits; checking whether a package (0201/0402, BGA pitch, fine-pitch IC) is assemblable; Economic vs Standard SMT; panelization (V-cut, 郵票孔, process borders, Mark points); flex stackups, coverlay, stiffeners; stencil ordering; or preparing / exporting Gerber+drill files for a JLC order (出圖, RS-274-X, layer mapping, plated vs non-plated holes, silkscreen-on-pads, the common DFM mistakes JLC flags). Triggers on: 嘉立創, JLC, JLCPCB, 工藝能力, 製程能力, DFM, design rules, min trace, 線寬線距, annular ring, 孔環, via, 過孔, 盲埋孔, HDI, 微孔, drill, 鑽孔, board thickness, 板厚,
tipoLi5890/akcli · ★ 4 · AI & Automation · score 74
Install: claude install-skill tipoLi5890/akcli
# akcli-jlcpcb-capabilities — 嘉立創/JLC manufacturer limits to design against
嘉立創/JLC is the **primary manufacturing reference** while designing a board.
This file holds the **judgment** (what to decide at schematic/layout time) and
the **handoff procedure**; the exhaustive capability numbers live in
`references/`, loaded on demand (see the index at the bottom).
**Sources**: 工藝能力頁 <https://www.jlc.com/portal/vtechnology.html> +
出圖/DFM 指導 <https://www.jlc.com/portal/server_guide_112.html> — extracted
2026-07-06, re-verified 2026-07-15. All numbers are a **point-in-time
snapshot**: for anything order-critical or borderline, confirm against the live
page and the order-time DFM/audit result.
## First decision: which service line?
**嘉立創 (jlc.com, domestic CN) and JLCPCB (jlcpcb.com, international) are the
same company but DIFFERENT service lines with different limits** — pick the one
the user will actually order from. The differences that change a design:
| Item | 嘉立創 jlc.com | JLCPCB intl |
|---|---|---|
| Max layers | **64** | 32 |
| Blind/buried vias (HDI) | **supported (4–32 L)** | not supported |
| Microvia | **0.1 mm** | 0.15 mm min |
| Outer copper (2-layer) | up to **6 oz** | up to 4.5 oz |
| Thickness | 0.4–**4.8 mm** | 0.4–4.5 mm |
| Standard-SMT min BGA pitch | **0.3 mm** | 0.35 mm |
Full delta in `references/jlcpcb-international.md`. **HDI / blind-buried vias
exist ONLY on 嘉立創 — if the design needs them and the user might order
internationally, that is a blocker to