arm-sve

# Arm SVE and SVE2 ## Contract | Field | Bound contract | |---|---| | Trigger | AArch64 code needs vector-length-agnostic SIMD: a NEON loop is being ported, an `arm_sve.h` kernel is being written, auto-vectorization to SVE is being checked, or SVE register state is being inspected in GDB. | | Authority | Reversible local: writes only the source files the user names; rollback is reverting them in version control. No remote mutation. | | Side effect | New or edited C sources. Runs the binary on the host or under QEMU for verification. | | Done | The kernel compiles with `-march=armv9-a+sve2`, produces the same result as the scalar reference for lengths that are not a multiple of the vector length, and runs correctly at two different vector lengths (hardware and QEMU, or two QEMU `sve<N>` settings). | ## Inputs - Source loop or NEON kernel to port, with a scalar reference to compare against. - Target machines and their SVE level: Graviton3 (Neoverse V1) has SVE, Graviton4 (Neoverse V2) has SVE2, Apple M1 through M3 have NEON only, Apple M4 has SME with streaming SVE and no non-streaming SVE. - Compiler: GCC or Clang, and version (`gcc --version`, `clang --version`). - GDB version if debugging (`gdb --version`). ## Procedure 1. Confirm the hardware and the compiler agree. Vector length (VL) is 128 to 2048 bits in 128-bit steps and is fixed per CPU; the code must not assume it. Done when: `/proc/cpuinfo` lists `sve` (and `sve2` if needed) and the compiler defines `__ARM_FEAT...